One of technologies most commonly used in driving a liquid crystal display panel is the inverted drive. The inverted drive is a method of driving the liquid crystal display panel, in order to prevent a so-called burning phenomenon, by inverting the polarity of data signals to be supplied in the data lines (signal lines) in a predetermined spatial cycle and in a predetermined temporal cycle. It should be noted here that in the present specification the polarity of data signal is define based on the reference to the voltage level in a common electrode in a liquid crystal display panel (the common voltage). If a given data signal has a signal level higher than the common voltage Vcom, the polarity of that data signal is defined as “positive”. On contrary, if a given data signal has a signal level lower than the common voltage Vcom, then the polarity of the data signal is defined as “negative”. The inverted drive is devised to effectively prevent the burning by decreasing the DC component of the voltage applied to the liquid crystal capacity of a pixel.
The period of cycling time for the polarity of the data signal to be inverted in the inverted drive may be selected in a various manner. In the most typical inverted drive, referred to as the dot inverted drive, a data signal having an inverted polarity is written in the adjoining pixels, both in horizontal direction and in vertical direction. More specifically, in the dot inverted drive, both in the horizontal direction and in the vertical direction, the polarity of the data signal is inverted for every one pixel. When driving a large scaled liquid crystal display panel, the polarity of the data signal is inverted for every one pixel in the horizontal direction, while on the other hand the polarity of the data signal is often inverted for every two pixels in the vertical direction. In the present specification, the type of inverted drive where the cycle for the plurality of the data signal to be inverted in the vertical direction is the number alpha pixels will be referred to as alpha H inverted drive. For instance the inverted drive method for inverting the polarity of the data signal for every one pixel in the vertical direction (as is done in the dot inverted drive) will be described as the 1H inverted drive, and the inverted drive method for inverting the polarity of the data signal in the vertical direction for every two pixels will be described as the 2H inverted drive.
The data signal in general is generated as follows. In the driver for generating the data signal (often referred to as a source driver), a grayscale voltage generator circuit, a D/A converter and a power amplifier are integrated. The grayscale voltage generator circuit generates one set of grayscale voltages having voltage levels each corresponding to a grayscale that a pixel may be set. The D/A converter selects a desired grayscale voltage in response to the display data from within the one set of grayscale voltages, and outputs thus selected grayscale voltage to the power amplifier. The display data in the present context is the data indicative of the grayscale of the pixel to be driven. The power amplifier outputs to the data line the data signal having the same voltage level as the grayscale voltage supplied from the D/A converter. In most of cases, for the power amplifier, a differential amplifier having the output from the output stage connected to one of two inputs in the input differential stage, or a voltage follower, is used.
In general, to generate the grayscale voltage in the grayscale voltage generator circuit, a resistance ladder together with an amplifier (an op-amplifier) for supplying the bias voltage to the ladder is used. By dividing the bias voltage by means of the resistance ladder one set of grayscale voltages may be generated. Since the bias voltage output from the amplifier connected to the resistance ladder is determined so as to be at the voltage level that the grayscale voltage reflects the gamma curve of the liquid crystal display panel, the amplifier to be connected to the resistance ladder is often referred to as a gamma amplifier. A voltage follower may be often used for the gamma amplifier.
One difficulty seen in the driver of a liquid crystal display panel is such that the amplifier integrated therein has an offset voltage; therefore the voltage actually output from the amplifier may or may not be different from the desired voltage. For example, when an offset voltage is present in the power amplifier, the voltage level of the data signal may be deviated from the desired level, as a result the voltage to be written in a pixel will also be deviated from the desired level. Consequently the actual grayscale expressed by the pixel will be differed from the desired grayscale, and eventually the image quality of the image will be degraded. In particular, the offset problem may be worsening if the offset voltage is not constant from one amplifier to another. The inconsistency of the offset voltage will be recognized by the naked human eye as the vertical striping irregularity extending in the direction of the data line. In a same manner if there is present an offset voltage in the gamma amplifier, then the actual grayscale expressed by the pixel may be deviated from the desired grayscale so that the image quality of the image will be degraded.
One effective approach to avoid the problem of the offset voltage in the amplifier is to invert the polarity of the offset voltage at an appropriate cycle. It is worth noting here that the polarity of the offset voltage in the present specification is the relationship between the voltage expected to be output from the amplifier (hereinafter, “desired voltage”), and the voltage actually output from the amplifier (hereinafter “actual voltage”), and that the concept is different from the polarity of the data signal. By inverting the polarity of the offset voltage at an appropriate cycle, it may be possible for the influence of the offset voltage not to be recognized by the naked human eye. In the following description, the polarity of the offset voltage is defined as “positive” when the actual voltage is higher than the desired voltage; the polarity of the offset voltage is defined as “negative” when the actual voltage is lower than the desired voltage.
In comparison with the reduction of the offset voltage, the inversion of the polarity of the offset voltage is easier in the technical view, and may be a more reasonable approach. The offset voltage of an amplifier is most often due to the dispersion of the threshold voltage seen in the MOS transistor pair which forms the input differential stage, and the dispersion of the threshold voltage seen in the MOS transistor pair which forms the active load connected to the input differential stage (such as for example the current mirror circuit). Thus, switching the connection between the input node of the amplifier and the MOS transistor pair forming the input differential stage, as well as the connection to the MOS transistor pair forming the active load may allow inverting the polarity of the offset voltage while maintaining the amplitude of the offset voltage.
More specifically, the patent publication JP-A-H11-305735 discloses a technology for avoiding the problem of the offset voltage by swapping the MOS transistor pair in the offset input differential stage at a cycle of 4 frame interval to invert the polarity of the offset voltage (see for example paragraph [0125] of the reference).
In addition, the Japanese patent publication JP-A-2002-108303 discloses a technology for avoiding the problem of offset voltage by inverting the polarity of offset voltage for a predetermined number of horizontal lines from within a predetermined number of frame intervals. In this patent, when one frame interval is formed of eight horizontal lines, as an example, the polarity of the offset voltage is inverted for every seven horizontal lines to cancel the offset voltage thereby for the 14 frame intervals as one cycle.
To further improve the image quality, it maybe preferable, as disclosed in the patent publication JP-A-H11-249623, to invert the plurality of the offset voltage for a predetermined number of horizontal lines within each frame interval. JP-A-H11-249623 publication discloses a technology for avoiding the problem of the offset voltage, by inverting the polarity of the offset voltage for every n horizontal lines in each frame interval and every n frame intervals. The foregoing patent publication also discloses a source driver, for generating a control signal (A, B) for controlling the polarity of the offset voltage of the power amplifier from the output timing controlling clock (CL1) for outputting the display data stored in the data latch circuit to the signal line of the liquid crystal display panel and from the frame interval recognizing signal (FLMN) for acknowledging each frame interval, then inverting the polarity of the offset voltage for every two horizontal lines within each frame interval, and for every two frame intervals (see for example paragraphs [0017], [0055], and FIG. 24). The circuit disclosed in this patent publication has the spatial cycling interval for inverting the polarity of the offset voltage fixed to two horizontal lines, because it uses the output timing controlling clock (CL1) and the frame interval recognizing signal (FLMN) for generating the control signal (A, B).